Abstract
Recently high-k gate dielectrics for SiC power MOSFETs attracted increasing research interest thanks to promising results related to improved specific channel resistances and threshold voltage stability. We investigated high-k gate stacks for 1.2kV and 3.3kV SiC power MOSFETs regarding on-state performance and stability during high temperature gate bias tests. Furthermore, we studied the high-k/SiC interface quality and the effect of burn-in pulses using SiC MOSCAPs. High-k SiC power MOSFETs show significant improvement in on-state performance and threshold voltage stability. We found that the burn-in pulses can be shorter for high-k gate dielectrics compared to SiO2-based devices.
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