Abstract
A new design for a lateral SiGe HBT has been based on development studies of confined lateral selective epitaxial growth in cavities built into silicon-on-insulator wafers. A design process is described and modelled. Device simulations indicate devices with maximum f T of 22 GHz with peak gain of 95 and f max of 14 GHz can be obtained by the processes outlined. The simulation results highlight the feasibility of the design and further improvements and scaling of the device would allow the transistor to operate at even higher frequencies and lower power.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
