Abstract
Progress in the development of novel LDMOS transistors in integrated circuits has also been made by combination of planar and trench gate topologies. This effort is discussed as an example of novel device technologies in more details. Based on the trench gate topologies described in Chap. 7, the combination of existing planar LDMOS designs with trench gate topology appeals from its ease of integration into commercially available smart-power IC fabrication processes. In this light, the electrical characteristics under static and dynamic device operation are discussed. Due to the device design, avalanche ruggedness and limitations under operation as high-side switches are especially considered. The resulting FOMs are analysed with respect to implementation of these devices for high output power and high frequency operation.
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