Larrabee

Abstract

The ample supply of transistors provided by advancements in process technology, combined with the increased difficultly to exploit single thread performance, moved the industry to populate several cores on a single die. This talk presents Larrabee -- the next bold step in this direction.Larrabee is a many-core visual computing architecture. Larrabee uses multiple in-order X86 CPU cores that are augmented by a wide vector processor unit, as well as some fixed function logic blocks. This provides dramatically higher performance per watt and per unit of area than out-of-order CPUs on highly parallel workloads. It also greatly increases the flexibility and programmability of the architecture as compared to standard GPUs. A coherent on-die 2nd level cache allows efficient inter-processor communication and high-bandwidth local data access by CPU cores. The customizable software graphics rendering pipeline for this architecture uses binning in order to reduce required memory bandwidth, and increase opportunities for parallelism relative to standard GPUs. The Larrabee native programming model supports a variety of highly parallel applications that use irregular data structures.