Large Facet-Specific Built-in Potential Differences Affecting Trap State Densities and Carrier Lifetimes of GaAs Wafers

Abstract

Previously, intrinsic GaAs {111} wafers showed appreciably better electrical conductivity than the {100} wafer and the least conductive {110} wafer. Such facet dependence can be understood from subtle variation in the bond length, bond geometry, and frontier orbital electron energy distribution for different surface planes. Attempting to gain more insights about the emergence of electrical facet effects, temperature- and voltage-varying impedance measurements were performed on these GaAs wafers using silver as the contacting electrode. Parameters from the impedance and Hall effect measurements allow the presentation of the facet-specific density and energy distribution of trap states located within the GaAs band gap. Charge carrier lifetime information can also be extracted from the impedance data. Unexpectedly, the {100} surface has the largest trap state density, while the {110} surface shows the smallest density of trap states. The {111} surface also gives the longest carrier lifetime. By contrast, the most electrically conductive {111} surface in the undoped Si and Ge wafers exhibits the lowest density of trap states and shortest carrier lifetime, which are considered as characteristics of a surface with a high-conductivity property. Facet-specific GaAs–Ag band diagrams reveal both upward and downward interfacial conduction band bending cases with positive and negative built-in potentials, which resemble n- and p-type semiconductor–metal junction situations. These irregular band diagrams may partly explain the unexpected state trap density and carrier lifetime behaviors seen in the GaAs wafers, making these parameters unsuitable to relate to their electrical conductivity properties.