Large area mold embedding technology with PCB based redistribution

Abstract

The constant drive to further miniaturization and heterogeneous system integration leads to a need for new packaging technologies which also allow large area processing and 3D integration with potential for low cost applications. Large area mold embedding technologies and embedding of active components into printed circuit boards (Chip-in-Polymer) are two major packaging trends in this area. This paper describes the potential of advanced compression molding processes for multi chip embedding in combination with large area and low cost redistribution technology derived from printed circuit board manufacturing. PCB based redistribution offers the potential of real large area redistribution up to 610 × 457 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the integration of vias (also through mold vias -TMVs) as both are standard features in PCB manufacturing. The use of compression molding equipment with liquid or granular epoxy molding compounds for the targeted integration process flow is a new technology that has been especially developed to allow large area embedding process for the manufacturing of single chip packages, multi chip packages or even heterogeneous systems on wafer scale, typically in 8" to 12" format. The wiring of the embedded components can be done using PCB manufacturing technologies, i.e. a resin coated copper (RCC) film is laminated over the embedded components and on the wafer backside for double sided redistribution. In a process flow similar to conventional PCB manufacturing μvias and through mold vias are drilled using a UV laser after RCC lamination and are metalized by galvanic Cu process in one step. Conductor lines and pads are formed by Cu etching. Finally, a soldermask and a solderable surface finish are applied - all of them standard PCB processes. If solder depots are necessary, e.g. for BGA packages, those can be applied by solder balling equipment - either by printing or by preform attach. To evaluate the potential of today's encapsulants for large area embedding processes, different liquid and granular molding compounds have been intensively evaluated on their processability, process & material induced die shift and warpage results. A strong focus was put on the process chain: chip placement on a temporary carrier - compression vacuum molding for embedding - RCC lamination - laser drilling processes for μVias & through holes - metallization structuring - module singulation & 3D assembly. The feasibility of the entire process chain is demonstrated by the fabrication of a Ball Grid Array (BGA) type of system package with two embedded dies and through mold vias allowing the stacking of these BGA packages. A demonstrator with two BGAs with embedded components and PCB based redistribution stacked on each other and mounted on a base substrate enabling the electrical connection of the stacked module was generated. Reliability of the manufactured 3D stacks is evaluated by temperature cycling and is analyzed both non-destructively and destructively. In summary this paper describes the potential of wafer level mold embedding technology in combination with PCB based redistribution processes towards a 3D SiP stack. Technological feasibility of the process flow is proven and a reliability characterization shows the applicability to consumer electronics applications at least. The technology described offers a cost effective packaging solution for e.g. future sensor/ASIC systems or processor/memory stacks providing miniaturization and sourcing advantages known from PoP assembly.