Abstract

Silicon nanocrystals (Si-NCs) embedded in a Lanthanum Fluoride (LaF3) insulating layer were fabricated as a charge trapping layer by a simple Chemical Bath Deposition (CBD) technique. The X-Ray diffraction of the deposited layer shows a polycrystalline LaF3 deposition on silicon. The charge storage behavior of Si-NCs embedded in the LaF3 layer have been investigated in metal-insulator-semiconductor (MIS) structures by electrical characterization, where various interface traps and defects were introduced by thermal annealing treatment. The flat-band voltage shift of capacitance-voltage (C–V) and conductance-voltage (G–V) curves of Si: NC-MIS devices were found to exhibit charge trapping. The current-voltage (I–V) measurement also demonstrate that traps have strong influence on the charge storage behavior, in which the traps and defects at the internal/surface of silicon nanocrystals and the interface states at the LaF3 /Si substrate play different roles, respectively. The flat-band voltage (VFB) shift was about 700 mV, which is agreed well enough to capture charge inside the nanoparticle for nonvolatile memory (NVM) device applications. Thickness-dependent flat-band voltage (VFB) shifts in the MIS structure which can be used as a low-voltage nonvolatile memory.

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