Abstract
With the planned high-luminosity upgrade of the LHC (HL-LHC), the ATLAS detector will see its collision rate increase by approximately a factor of 5 with respect to the current LHC operation. The earliest hardware-based ATLAS trigger stage (“Level 1”) will have to provide a higher rejection factor in a more difficult environment: a new improved Level 1 trigger architecture is under study, which includes the possibility of extracting with low latency and high accuracy tracking information in time for the decision taking process. In this context, the feasibility of potential approaches aimed at providing low-latency high-quality tracking at Level 1 is discussed.
Highlights
The LHC high-luminosity upgrade will start after 2022 and will provide an instantaneous luminosity of approximately 7.5×1034 Hz/cm
The ATLAS inner tracker (ITk) will be completely replaced with a lighter detector extending to higher rapidities
ITk layers will be made of double-sided silicon strip detectors with 74.5 μm spaced strips ranging in r-z layout of the upgraded ATLAS inner tracker for Phase II
Summary
The LHC high-luminosity upgrade will start after 2022 and will provide an instantaneous luminosity of approximately 7.5×1034 Hz/cm. As for Higgs physics, the figure on the right shows a simulation of the expected observable signal in the ATLAS detector for the rare H➝μμ decay: a 7σ 0.3% S/B observation is expected with 3 ab-1 of integrated luminosity. In order to reach the required instantaneous luminosities, ATLAS will need to face challenging conditions: event pile-up is expected for instance to increase to the level of ~200. Because of such conditions and in order to prepare for the unforeseen, the design of the ATLAS trigger system aims to implement sufficient redundancy to be robust and flexible. In order to attain this efficiency, tracks must be reconstructed with high-efficiency for pT≥4GeV
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