Abstract

One of the proposed solutions currently under study in Compact Muon Solenoid (CMS) collaboration [1] to reconstruct tracks at the first level trigger (L1) for the High Luminosity - Large Hadron Collider (HL-LHC) is based on the usage of Associative Memory [2] (AM) chips. The tracker information is first reduced to suppress low pT tracks and sent to boards equipped with AM chips. Each AM compares the tracker information with pre-calculated expectations (pattern matching) in a very short time (order of a μs), therefore providing a solution to the challenging computational problem of pattern recognition in a very busy environment. Associated to fast track fit methods, like the Hough transform, the AM approach should be able to fulfil the very demanding requirements of L1 tracking. The proposed architecture for the AM-based L1 track reconstruction system will be presented, together with the latest results obtained using a complete software emulation of this system.

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