Junction-to-top and junction-to-board thermal resistance measurement for 119 BGA packages

Abstract

Junction-to-top (/spl theta//sub jt/) and junction-to-board (/spl theta//sub jb/) thermal resistance of a 119 BGA package for 4 Mbit SP SRAM have been investigated using the cold plate-Teflon block method and was compared with the junction-to-case thermal resistance (/spl theta//sub jc/) measurement method. Both thermal dice and real dice were prepared to measure the 119 BGA package thermal resistance. The junction-to-case and junction-to-top thermal resistance for a real die are about 3.5/spl deg/C/W and 3.8/spl deg/C/W respectively, whereas with a thermal die, the junction-to-case and junction-to-top thermal resistance are 4.0/spl deg/C/W and 4.8/spl deg/C/W respectively. For both thermal and real die, the junction-to-case thermal resistance is less than the junction-to-top thermal resistance. This is attributed to the different thermal boundary conditions applied to the 119 BGA package for each test method. In the meantime, thermal resistances of packages with thermal dice were approximately 14.3/spl sim/26.3% higher than those of package with real dice, the reason for which is being investigated.