Abstract
A nine-bit Josephson pseudorandom bit-sequence generator for use in Josephson computers and signal processors is described. The gates used in the circuit are modified variable threshold logic (MVTL) gates fabricated using 2.5- mu m Nb-AlO/sub x/-Nb junction technology with Mo resistors and SiO/sub 2/ insulation. They are driven by a three-phase power supply. The circuit consists of 66 gates and its area is 4.2*0.5 mm/sup 2/. Correct bit sequences with one period of 2/sup 9/-1=511 clocks were obtained. Its power consumption was 0.9 mW. The circuit operated at a clock frequency of up to 2.2 GHz.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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