Abstract
Random Telegraph Noise is a relevant source of variability in integrated circuits and a growing issue due to device scaling. Jitter is one of its consequences; therefore, it is an important parameter of performance measurements for electronic components and systems. In this paper, the relationship between Random Telegraph Noise and different concepts of jitter is studied. Firstly, a gate delay variability study of a CMOS inverter is discussed. Then, an absolute, a periodic, and a cycle-to-cycle jitter are evaluated in a five-stage ring oscillator. All the data were generated with a spice simulator modified to properly account for Random Telegraph Noise, using the Monte Carlo technique.
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