JFET preamplifiers with different reset techniques on detector-grade high-resistivity silicon

Abstract

This paper presents the experimental results relevant to JFET charge preamplifiers fabricated in a detector-compatible technology. This fabrication process, developed at the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy, is being tuned with the aim of integrating a multichannel mixed analog-digital circuit together with semiconductor detectors in a high-resistivity substrate. Possible applications are in the field of medical and industrial imaging, in space and high energy physics experiments. An all-NJFET charge sensitive amplifier, which can use either a resistive or a nonresistive reset in the feedback network, has been tested. The two configurations have been studied, paying particular attention to noise performances, in view of the design of the complete readout channel.