ITRS lithography roadmap: status and challenges

Abstract

Abstract Recent ITRS lithography roadmaps show a big technology decision approaching the semiconductor industry about how to do leading edge lithography. The need is rapidly approaching for the industry to select an option for the 22-nm half pitch, but no decision has been made yet. The main options for the 22-nm half pitch are extreme ultraviolet (EUV), ArF immersion lithography with multiple patterning, and maskless lithography. For the 16-nm half pitch, directed self-assembly (DSA) is also an option. The EUV has the most industry investment and is the closest to current lithography in the way it works but still faces challenges in tool productivity and defect-free masks. The nanoimprint needs to overcome the defect, contamination, and overlay challenges before it can be applied to the semiconductor production. Maskless lithography may be used first for prototyping and small volume products where mask costs per chip produced would be very high. Double patterning could be extended to multiple pattering, but would give tremendous process complexity and exponentially rising mask costs due to the many exposures needed per level. The DSA, which only recently has emerged from the research stage, has the potential for very high resolution but represents a huge change in how critical dimensions are formed and controlled.