Iterative Diagnosis Approach for ECC-Based Memory Repair

Abstract

In modern SoCs embedded memories should be protected by ECC against field failures to achieve acceptable reliability. They should also be repaired after fabrication to achieve acceptable fabrication yield, as well as during lifetime to increase lifespan. In technologies affected by high defect densities, conventional repair induces very high cost. To reduce it, in previous work we proposed the ECC-based repair scheme, consisting in using the ECC for fixing words comprising a single faulty cell, and self-repair to fix all other faulty words. This approach is of high interest for ultimate CMOS and post-CMOS technologies, where the defect densities are expected to increase significantly, and/or in very-low power designs as very-low voltage sharply increases defect densities. However, we showed recently that, for high defect densities the diagnosis circuitry required for ECC-based repair may induce large cost. In previous work we addressed this issue by means of a new family of memory test algorithms that exhibit the so-called single-read double-fault detection (SRDF) property. The SRDF algorithms resolve the diagnosis issue at no area cost. However, as they are complex and increase test length, in this paper we explore a new diagnosis approach using iterative test execution, which, together with the SRDF test algorithms, provide a set of options enabling efficient tradeoffs in terms of hardware and power costs, and test length.