Abstract

Ion-induced damage is an important issue in III–V and Si–Ge devices. The principal cause of damage is the introduction of traps and point defects by ions penetrating into the semiconductor. At the low ion energies used in modern process technology (100 eV say) the bulk of the ions remain on or within a few nm of surfaces. However some channel along the <110> direction and so penetrate into the semiconductor to a depth of 30 to 50 nm. In high electron mobility transistors (HEMT's) with fT greater than 100 GHz, the active current carrying layer is only 30 to 50 nm below the surface. In compound semiconductors it is usually impossible to anneal such damage away. An analytic model of this channelling has been developed and its accuracy checked by measuring the penetration of ions produced by a very low energy implantation. An important finding is while atomic ions (e.g. Cl+) can channel and so cause damage, molecular ions (e.g. Cl2+) do not. This can be used to predict processes that will be suitable for low damage.

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