IP address lookup and packet classification algorithms

Abstract

The Internet system consists of packet transmission media and packet processing elements. Optical fibers are used as packet transmission media and Internet routers implement the functions of packet processing elements. In order to keep up with the wire rate speed (optical fiber transmission speed), Internet routers must forward the Internet packets at a very high speed, while keeping the cost low. Though many efforts have been devoted to address this issue, there is still much to be improved. IP address lookup and packet classification are one of the most important functions (bottlenecks) performed by Internet routers. We need to perform IP address lookup and/or packet classification at the wire rate speed. Many solutions exist to tackle this problem. There are the early days software solutions and recently hardware solutions such as TCAM, ASIC. The problem has attracted much attention from both academic and industrial societies. Developing high performance algorithms to overcome the drawbacks of existing solutions is the objective of this thesis. In this thesis, we propose three algorithms for IP address lookup and packet classification in Internet routers: the first one is for IP address lookup; the second one is a dynamic algorithm for IP address lookup; the third one is for packet classification. Although several Ph.D. theses [64, 74, 26] have been generated in recent years in the packet classification field, our work represents one of the accomplishments in this field. Our goal is to develop algorithms, which consume as little memory as possible so that the algorithms can be implemented on a single chip. Since on-chip memory access is much faster than off-chip memory, the speed for IP address lookup or packet classification can be significantly increased. We have achieved this goal. The prominent feature of our algorithms is that they consume the least amount of memory compared to the other current solutions. Another feature is that all the algorithms are amenable to pipelined and/or parallel implementations. Thus, the speed is only restricted by memory access latency. In the future, when the speed requirement increases due to the advancement of other technologies, such as the increased wire rate speed, algorithms that are suitable for on-chip SRAM implementation will be the only solution. We believe we represent the trend of future technology. First, we give a background and review of the existing technologies in the field of IP address lookup and packet classification. After that, three algorithms are detailed in each of the following chapters. We conclude in the last chapter.