Ion Migration in Monolayer MoS2 Memristors

Abstract

Memristors hold great promise as building blocks for future computing architectures where memory and logic are combined at the hardware level. However, scaling down the dimensions of memristive devices has been limited by high leakage currents, thus inhibiting further progress. Recent studies have demonstrated memristors with monolayers of ${\mathrm{Mo}\mathrm{S}}_{2}$ and large high-to-low resistance ratios. Defects combined with metallic ion migrations are often seen as a possible explanation for this behavior. A detailed understanding of the switching mechanisms, in particular the role of metal ion diffusion into vacancy sites and crystal defects, remains elusive. Here we investigate how defect densities affect the performance of monolayer ${\mathrm{Mo}\mathrm{S}}_{2}$ memristors. We experimentally demonstrate that the resistive switching ratio becomes larger if the defect density in ${\mathrm{Mo}\mathrm{S}}_{2}$ is increased. Furthermore, by means of ab initio quantum transport simulations, we reveal the existence of an optimum range of defect densities and explore the theoretical limits of monolayer ${\mathrm{Mo}\mathrm{S}}_{2}$ memristors. Our results highlight the importance of defect engineering and control in transition metal dichalcogenides memristors.