Abstract

We report on the fabrication of nanoscale, three-terminal in-plane spin–orbit torque switching devices with low switching current densities. Critical parameters in the fabrication process, including the ion beam etching angle and time, were optimized to avoid fabrication defects and improve device yield. Measurements of the magnetic field and current-induced switching behavior of the tunnel junctions demonstrate a sensitivity to the nanopillar aspect ratio, which dictates the nanopillars’ anisotropy and thermal stability. Additionally, we show that the current density required for switching can be reduced and the device thermal stability increased by inserting Hf interlayers into the heterostructure. Micromagnetic simulations are generally consistent with the experimentally observed switching behavior, suggesting an increase in the interfacial perpendicular anisotropy at the CoFeB/MgO interface and the reduction in the Dzyaloshinskii–Moriya interaction at the W/CoFeB interface by the Hf interlayers.

Highlights

  • Spin-transfer-torque (STT) magnetic random access memory (MRAM) devices are emerging as a fast and low-error-rate nonvolatile memory1–3 and elements for non-traditional computing.4 for switching times well below 10 ns, avoiding a breakdown of the thin tunnel barrier becomes a challenge

  • If the etch process was stopped at s = 0, small residual CoFeB islands are left on the W bridge, which led to multi-domain transitions in the tunneling magnetoresistance (TMR) hysteresis loop as shown in Fig. 3(b), while for an over-etch time of s = 20 s, the device showed a well-defined single domain transition curve

  • The simulation results indicate that the reduction in Dzyaloshinskii–Moriya interaction (DMI) due to the insertion of the Hf interlayers impedes the formation of domain walls, leading to higher critical switching field—a better thermal stability, while the introduction of perpendicular interfacial anisotropy lowers the effective magnetization, leading to reduced Jc0 values in SOT-MRAMs—highlighting the utility of Hf interlayers and dusting layers in enhancing the thermal stability of nanopillars while lowering the critical current density in SOT-MRAMs

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Summary

INTRODUCTION

Spin-transfer-torque (STT) magnetic random access memory (MRAM) devices are emerging as a fast and low-error-rate nonvolatile memory and elements for non-traditional computing. for switching times well below 10 ns, avoiding a breakdown of the thin tunnel barrier becomes a challenge. Using a two-terminal tunnel junction-based STT-MRAM cell requires compromises in the design of the read and write circuits. A three-terminal spin–orbit-torque (SOT)-based memory cell allows for the independent optimization of the write and read processes—potentially enabling further improvements in MRAM performance metrics, facilitating broader adoption. Researchers have successfully used SOT to switch magnetic layers and MTJs using several different approaches.. Researchers have successfully used SOT to switch magnetic layers and MTJs using several different approaches.6–15 Among these methods, SOT switching of devices with in-plane magnetization is one of the simpler schemes to implement.. SOT switching of devices with in-plane magnetization is one of the simpler schemes to implement.6,8,16 Since this approach is contingent on shape anisotropy energy for the bit-state’s stability, additional care is required during fabrication to ensure shape fidelity. We further inserted dusting and spacer Hf interlayers in our MTJs, which simultaneously reduces the Dzyaloshinskii–Moriya interaction (DMI), enhances the interfacial magnetic anisotropy, and suppresses the interfacial spin-memory loss16,17—enhancing the thermal stability of the devices while reducing the switching current density

EXPERIMENTAL TECHNIQUES
Device configuration and fabrication process flow
IBE angle and time effects
SOT switching and aspect ratio effects
Hf spacer and dusting layers
CONCLUSION
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