(Invited) UVPL Imaging of 4H-SiC Wafers Along the Device Processing Chain

Abstract

The market for power electronic devices is highly competitive among devices made of silicon (Si), silicon carbide (4H-SiC) and gallium nitride (GaN) – devices with best performance and reliability at lowest cost will win the race. The price of SiC devices depends on material costs and device production yield, the latter one is limited by technological and structural defects. The device performance is a matter of device design and process technology, and the device reliability is often limited by structural defects. Hence, a characterization method for structural defects in substrates, epiwafers and partially processed wafers is a keystone for development of competitive SiC power electronic devices. Photoluminescence imaging with excitation in the ultraviolet range (UVPL imaging) is an established and powerful technique for such process-accompanying measurements of SiC wafers and we will review its current status in our talk. In this paper we will compare different UVPL imaging systems available on the market in terms of UV excitation parameters and their PL detectors and discuss their defect detection capabilities. We will present the visibility of structural defects in substrates and epiwafers with regard to their defect-specific PL wavelength as well as excitation wavelength and intensity. SiC epiwafers can be optically stressed by using high excitation intensity, i.e. the conversion of basal plane dislocations to stacking faults can be provoked in unprocessed material as shown in figure 1. This “optical stress test” can be used for material quality testing prior to device processing as well as for scientific questions such as the velocities of dislocations. Furthermore, we will present UVPL images of partially processed SiC wafers revealing technologically induced structural defects. In case of 6.5 kV PIN diodes, the UVPL measurements allow even for prediction of bipolar device degradation. UVPL imaging provides fast, non-destructive defect characterization on full-wafer area and allows for targeted process optimization in epitaxial growth and device processing as well as for process control measurements. Defects can be tracked from substrate/epiwafer to different stages of device production. Hence, UVPL imaging is of great importance for cost reduction and reliability improvement of SiC power electronic devices. Figure 1