(Invited) Theoretical Understanding of Nanoscale Ferroelectric Field-Effect-Transistor Having a Poly-Domain Structure

Abstract

The emergence of ferroelectricity in doped HfO2 and (Hf,Zr)O2 (HZO) thin film with a typical thickness ~10 nm brings back the great interest in ferroelectric (FE) memories including the conventional ferroelectric random access memory, ferroelectric field-effect transistors (FEFET), and more recent negative capacitance field-effect transistors, in not only academia but also memory industry. In the industry, one of the most important issues concerning a FEFET is whether FEFET based NAND (FE-NAND) memory can be a next-generation device with superior performance to a conventional CTF-based NAND memory. For this purpose, it must have the multi-level capability and lower interference between adjacent memory cells. Because of sufficiently large ferroelectric polarization (10~15 uC/cm2 for typical HZO thin film), the multi-level capacity of FE-NAND would be higher than that of CTF-based NAND. However, an experimental result of FE-NAND devices shows that only a tenth of the expected memory window for the reading operation was achieved. At the same time, ten times larger erasing/writing voltages are required.In this work, we presented the comprehensive FEFET model to describe the writing process and reading process in FEFET from the fundamental viewpoint of metal-oxide-semiconductor (MOS) FET device physics in conjunction with the FE switching phenomenon. To capture the multi-domain nature of the ferroelectric thin film, we adopted the time-dependent Ginzburg-Landau (TDGL) formalism as a core physics of the switching kinetics. Furthermore, the FEFET model has been extended to a 3-Dimensional FE-NAND simulation. These models showed that the multi-domain nature of the ferroelectric film, which is shared by serial gates in the FE NAND device, not only degrades gate controllability on a target memory cell but also decreases a magnitude of surface potential. The extensive simulation results provided a critical view to understand the degraded memory window of FEFET and a possible strategy for the improvement.