Abstract

A sufficiently large threshold voltage (Vth) is generally demanded for high-voltage power MOSFETs with 4H-SiC, however, the increase in channel doping concentration to tune Vth inevitably induces a significant reduction of carrier mobility in the inversion channel, due to Coulomb scattering at SiO2/4H-SiC interface [1]. Another serious problem is that negative Vth shifts are often observed by employing SiC surface nitridation process, usually done by a post-oxidation annealing (POA) in NO ambient at elevated temperature. Such processes introduce nitrogen atoms selectively to the surface of SiC by substituting the topmost carbon atoms [2]. Currently such nitrogen passivation process is inevitable to fabricate 4H-SiC MOS gate stacks with sufficiently low interface state density and good device reliability. Therefore the development of technique to design Vth of 4H-SiC MOSFETs is strongly demanded based on the understanding of the factors to cause Vth shift.First we systematically studied the flat-band voltage (Vfb) of SiO2/4H-SiC (0001) n-type MOS capacitors with various oxide thickness, fabricated by conventional dry oxidation followed by NO-POA. From the oxide thickness dependence of Vfb we could deduce the expected Vfb value when the effects of fixed charges are removed. As a result we found an anomalous negative shift of Vfb in several hundreds of mV irrespective of oxide thickness, which was enlarged by extending NO annealing duration [3]. This phenomenon is quite unexpected but would be explainable by assuming a dipole layer formation at the interface by SiC surface nitridation. Considering the polar Si-N bond formation with high density ~1014 cm2 at the interface, the SiC surface with Si-coordinated N atoms could introduce a dipole layer.SiO2/4H-SiC band alignment was investigated by two kinds of methods: the valence-band spectra analysis using x-ray photoelectron spectroscopy and the energy barrier height characterization of Fowler-Nordheim (F-N) current analysis. A clear trend was observed that the valence-band offset between 4H-SiC (0001) and SiO2 changes monotonically by the NO-POA durations to result in a increase of conduction-band offset at SiO2/SiC interface, which naturally explains the unexpected negative shift of Vfb observed in MOS capacitors. To our surprise, this trend appeared to the opposite direction for the gate stacks on 4H-SiC (000-1) or (1-100) fabricated with similar processes. For the MOS capacitors on (0001), we could clearly see a decreasing trend of F-N tunneling current by NO annealing duration which was attributable to the increase of conduction-band offset, while the opposite trend was observed for the capacitors on (000-1) and (1-100). Even though the defect-assisted conduction mechanisms such as Pool-Frenkel model appears to dominantly determine the temperature-dependence and electric-field-dependence of the leakage current at room temperatures or higher, obviously higher leakage current level for a given electric field was observed on (000-1) and (1-100) stacks than (0001), which should be attributable to the significant difference of the band alignment in several hundreds of mV. These results clarify that there are significant intrinsic difference of the gate leakage characteristics among SiC gate stacks on different crystal orientations, as well as the value of Vfb, explainable by the difference of band alignment.Next we examined a way to tune the Vfb of SiC gate stacks by the introduction of another dipole layer, by depositing of just a few nm-thick Al2O3 layer on top of SiO2 after NO-POA, based on the concept of oxide interface dipole layers reported for various high-k/SiO2 interfaces [4]. As a result we successfully demonstrated ~1V Vfb shift without a deterioration of interface state density only by Al2O3 deposition and post-deposition annealing. This technique is expected as a method not only to overcome the unexpected change of Vfb by nitrogen passivation process, but to achieve larger Vth without increasing the channel doping to avoid the deterioration of channel mobility.In conclusion, we found that nitrogen passivation of SiO2/4H-SiC gate stacks resulted in a significant change of band alignment to increase the conduction band offset on (0001) stack but to decrease the offset on (000-1) or (1-100) stacks, which results in a difference of gate leakage characteristics as well as Vfb. Control of the formation of dipole layers at SiO2/SiC interface and/or that formed in the multilayer dielectrics would have important roles to tune the band alignment of SiC gate stacks.[1] M. Noguchi et al., Jpn. J. Appl. Phys. 58, 031004 (2019).[2] J. Rozen et al., J. Appl. Phys. 105, 124506 (2009).[3] T. H. Kil and K. Kita, Appl. Phys. Lett. 116, 122103 (2020).[4] K. Kita and A. Toriumi, Appl. Phys. Lett. 94, 132902 (2009).

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