(Invited) Smartphones: Driving Technology to More than Moore 3-D Stacked Devices/Chips and More Moore FinFET 3-D Doping with High Mobility Channel Materials from 20/22nm Production to 5/7nm Exploratory Research

Abstract

3-D bulk-FinFET at 22nm node uses (551) 8o tapered Fin sidewall with 45o high tilt implantation for doping, eSiGe S/D for PMOS channel compressive strain and amorphous implant SPC (solid phase crystallization) dislocation defects for NMOS channel tensile strain. For 14nm node taller Fins with vertical sidewalls and partial recess embedded n+ S/D was added. 7/10nm node will use direct high mobility channel materials 50% SiGe to 100% Ge. To avoid CVD Ge or SiGe epi defects liquid phase crystallization (LPC) by laser melt annealing is an alternative using amorphous-Ge dose control deposition by ion implantation and at 5nm node gate-all-around (GAA) nano-wire. Residual implant damage into Ge material creates high level of acceptors up to 7E19/cm3 requiring high temperature annealing above 600oC to annihilate and establish stable p+ or n+ dopant activation for ultra-shallow junctions. For USJ n+ junctions in Ge, melt controlled junction depth using Sb dopant results in highest dopant activation >1E21/cm3 at sub-10nm junction depth. Si-capping layer offers lowest n+ Ge junction leakage and Sn co-implantation enables surface strain-Ge engineering for higher channel mobility.