(Invited) Raman Stress Measurements at the Nanoscale

Abstract

In semiconductor technology, mechanical stress is one of the principal performance boosters available to device engineering for the development of state-of-the-art logic transistors. Currently available strain characterization techniques are either destructive or have low spatial resolution because they use broad beams (Raman, X-ray diffraction). Fast, accurate and non-invasive stress measurements beyond the diffraction limit remain a challenge. However, it was recently found that the geometry of the structure itself can be used as an enhancement tool to bring out the relevant Raman signals from the region of interest. The theoretical understanding of the effect was fine-tuned such that the concept can be applied on the materials and structures of choice. Recently a strategy was developed to extract detailed and quantitative stress values of deep sub-wavelength semiconductor structures. The approach enables the quick and non-invasive quantitative characterization of stress inside CMOS devices of the next generation.