(Invited) Non-Planar Transistors with High-Mobility SiGe/Ge Channels for CMOS Applications

Abstract

Firstly, advantages and fabrication processes for strained SiGe fin- and wire-pMOSFETs are summarized. It is shown that strained SiGe-on-insulator channels formed by the Ge condensation process is effective to keep strain in the channel and hence to boost the current drivability of pMOSFETs. Secondly, our recent progress on a new gate-stack technology using SrGex interlayer and fabrication process of narrow Ge-fin structures using anisotropic wet etching were demonstrated for all-Ge CMOS applications. It is shown that these processes are beneficial for realizing non-planar Ge-CMOS devices in future technology nodes.