(Invited) Nm-Scale Patterns and Selectivity: A Blessing or a Curse

Abstract

Area-selective deposition (ASD) is a promising technique for semiconductor device manufacturing. The replication of nanoscale patterns by ASD can simplify device fabrication process flows by reducing the number of lithography, etch and chemical-mechanical polishing steps. In addition, ASD could eliminate pattern overlay errors. ASD is of special interest as device dimensions scale and has recently been shown as viable approach for the fully self-aligned via, to enable interconnect scaling beyond the 3 nm node [1]. However, the dependence of the selectivity of ALD and CVD processes on the patterning process and pattern dimensions is poorly documented. This aspect will be investigated in the current presentation. We will discuss the fundamental mechanisms of ALD growth mechanisms and how they influence selectivity. Next, we will discuss an example of Ru ASD with defect mitigation in nm-scale patterns on full 300-mm wafers [2].[1] Chen et al., IEDM21, 486-489.[2] Clerix et al., Adv. Mater. Interfaces 2021, 2100846.