Abstract
In recent years, the demand for biologically inspired systems for diverse applications, such as object recognition, autonomous vehicles, and humanoid robot, has been continuously increasing. Particularly, neuromorphic computing, imitating the energy-efficient neural network in the human brain, has become powerful candidate that can overcome the limitations of the conventional von Neumann architecture, named ‘von Neumann bottleneck’. To realize neuromorphic computing, a concept of crossbar array of memristors was suggested. A memristor is a two-terminal circuit element that can store binary information within the active layer in a nonvolatile fashion by the electrical stimulation. In addition to its nonvolatility, it has received a remarkable attention for future memory and neuromorphic applications owing to its high endurance, fast switching speed, small form factor, low energy consumption, and multi-state switching capability. Nevertheless, two-terminal memristors cannot fully provide the complex functions of neurons, and thus, they are still not enough to operate complex and massive datasets. In this regard, tremendous efforts have been dedicated to the development of miscellaneous functional circuit elements for neuromorphic and in-memory computing. One way to enable this is combining the memristor with various functional circuit elements such as capacitor, inductor, or transistor. In our study, we demonstrated a programmable and multi-functional memristive transistor by integrating a hexagonal boron nitride (h-BN) memristor and a molybdenum disulfide (MoS2) transistor. The device was fabricated by sequential stacking semiconducting MoS2, semi-metallic graphene, and insulating h-BN on a SiO2/p++-Si substrate in order, followed by deposition of contact metal. The memristive transistor consisted of a vertical graphene/h-BN/Ti/Au memristor and a lateral graphene/MoS2/Ti/Au transistor as shown in the figure. Mechanically exfoliated h-BN-based memristors showed stable resistive switching behavior as the conducting filament(s) formed and annihilated through the breakdown path within the h-BN layer. The behavior of the memristive transistor can be programmably modulated by switching the resistance state of the memristor, and it showed extremely low standby power consumption of ~16 pW. Notably, multi-state resistance and tunable current on/off ratio can be attained by controlling the synaptic weight of the device. This novel architecture can also perform logical operation by changing the electrical circuitry. The proposed device provides a higher degree of functionality in both logic and memory applications, thereby a step toward the achievement of energy-efficient in-memory computing is expected. The details of the experimental results will be presented. Figure 1
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