Abstract
In this work, three important processing steps controlling the performance of SiGe-channel Implant Free Quantum Well pFETs are presented: the thermal budget, the source/drain SiGe stressors and the narrow width effect. In the first part, it is demonstrated that the thermal budget applied on these devices needs to remain low enough to avoid channel relaxation, especially when Si1-xGex -channel with x>0.45 is considered. Second, both raised or embedded SiGe source/drain uni-axially strain the SiGe channel which highly contributes to the final device performance. Outlook for ultra-scaled SiGe-channel IFQW pFETs is also given. Last but not least, SiGe-channel has an inherent strain booster which is the narrow width effect. The latter is fully explained through experimental and simulation data. Controlling all the three aforementioned parameters allows the demonstration of a 1.5mA/um ION at 100nA/um IOFF SiGe-pFET which is in line with the best results seen from the literature.
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