Abstract

Oxide thin-film transistors (TFTs) using amorphous oxide semiconductors such as a-InGaZnO4 (a-IGZO) are attracting attention for realizing next generation displays as well as for flexible mobile devices. From a point of practical use, it is important to achieve stable electrical characteristics in oxide TFTs. Thus various reports have been made on instability of oxide TFTs’ characteristics, such as threshold voltage shift and a light deterioration phenomenon caused by application of bias voltage or light illumination.1-3) Hot carrier effects, however, induced by high drain voltage in oxide TFTs have been still unclear.Hot carrier effects are well-known phenomena in low temperature polycrystalline Si TFTs, and photon emission has been observed under high drain voltage.4) In recent years, we also have observed photon emission under high drain voltage for etch stop layer (ESL)-type oxide TFTs with a source/drain (S/D) that overlapped less than 1 µm on ESL.5) In this paper, we discuss the hot carrier effects depends on structures of oxide TFTs.We fabricated back channel etching (BCE)-type, top gate (TG)-type and ESL-type5) TFTs using oxide semiconductor material as active layers as shown in Fig. 1(a), (c) and (e), respectively. For BCE-type TFTs, a gate, a gate insulator, a-IGZO, S/D and a passivation were formed on a glass substrate in that order. For TG-type TFTs, low resistance regions in amorphous oxide semiconductor layer, which has higher mobility than a-IGZO, were self-aligned to the gate. For the ESL-type TFTs, an overlap length of the S/D on the ESL was 3 µm. Other fabrication process were described in previous report.5-6) As shown in Fig. 1(b), for the BCE-type TFT with channel width (W) /channel length (L) =15 µm/8 µm under Vds=25 V and Vgs=10 V, photon emission was observed at the drain edge opposite to the source. Two positions where most photon was irradiated correspond to those where the drain slightly extends to the source. As shown in Fig. 1(d), for the TG-type TFT with W/L = 10 µm/10 µm under Vds=40 V and Vgs=18 V, photon emission was observed at the gate edge opposite to the drain and at the drain edge opposite to the gate. For both these two regions, positions where most photon was irradiated correspond to the edge of active layer, which is often pointed out as one of the causes of instability of TFT characteristics.6) Although drain current (Ids) increased at higher Vgs than Fig. 1(b) and (d), photon counts decreased. From these results, we consider the observed photon emission were induced by hot carrier in the oxide semiconductor layers and photon emission images show regions which may affect instability of TFT characteristics.On the other hands, for the ESL-type TFT with channel width (W) /channel length (L) =5 µm/14 µm, photon emission was not observed even under drain voltage (Vds) =40 V and gate voltage (Vgs) =12 V as shown in Fig. 1(e). However, we experimentally observed that when the overlap length of the drain on the ESL decreases from 3 µm to 0 µm, photon emission was observed. Furthermore, TCAD simulation showed that the large electric field of 3.5×105 V/cm appears locally at the drain edge for the overlap length=0 μm while that relaxed to less than 2.2×105 V/cm for the overlap length>1 μm. These results suggest that existence of the drain/ESL overlap region can weaken the electric filed at the drain edge, and as a result we do not see photon emission in the ESL-type TFT with the overlap length=3 µm.In summary, we evaluated hot carrier effect for the BCE-, the TG-type and the ESL-type oxide TFTs with photon emission analysis. Photon emission was observed for the BCE- and the TG-type TFT while it was not observed for the ESL-type TFT with the overlap length of the drain on the ESL=3 µm. We consider one of reasons of these results would be difference in the structure near the drain of each TFT. In the PRiME 2020 meeting, we would like to discuss these phenomenon in detail using experiment and TCAD simulation.References1) K. Takechi et al., Jpn. J. Appl. Phys., 48, 010203 (2009).2) J. Tanaka et al., ECS Journal of Solid State Science and Technology, 4 (7) Q61 (2015).3) Y. Uraoka et al., Jpn. J. Appl. Phys., 58, 090502 (2019).4) Y. Uraoka et al., IEEE Trans. Electron Devices, 51, 28 (2004).5) T. Takahashi et al., Appl. Phys. Express, 12, 094007 (2019).6) Y. Kuwahara et al., IEEE Electron Device Lett., 40, 8 (2019). Figure 1

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