(Invited) History of Micro-/Nano-Electronics Development; Breakthroughs and Innovations

Abstract

Introduction Although the first MOSFET-like device ideas were proposed about 90 years ago by J. E. Lilienfeld [1], it took 30 years for the first operational MOSFET to have been successfully fabricated by selecting Al/SiO2/Si as the MOS materials by D. Kahng and M. Attalla [2]. Then, another 10 years were necessary until it had evolved to Large Scale Integrated circuits (LSIs). Indeed ‘microelectronics’ started in early 1970’s with microprocessors fabricated on the LSI chips. At that time, the technology was 10 μm PMOS LSIs. Now, it has evolved to 10 nm-range CMOS LSIs. In the past 50 years, we have experienced 23 generations (each about 2.5 years) of the shrinkage, and the MOSFETs size has decreased by 1,000 times, resulting in an increase in integration density with 1 million times. The continuous increase with the constant rate is the Moore’s law [3], but no one including me could imagine its continuation of over 50 years. The downsizing of MOSFETs has been accomplished based on the scaling scheme proposed by R. Dennard [4], but we have encountered very serious problems at every new generation. Fortunately, however, we have so far succeeded in finding the solutions. This presentation explains some of the history of micro-/nano-electronics technology developments in the past 50 years based on my experience and memory. Technology development for the past 50 years In order to shrink the size, removing the misalignment space margin between the layers is effective, and 2 self-align techniques, Si-gate (between gate and source/drain) and LOCOS (between filed diffusion and oxide) were developed at the end of 1960’s. Then, at the beginning of 1970’s, the fabrication process was simple, with 5 masks for the lithography; field isolation, gate electrode, contact hole, Al interconnects, and bonding pad, with options of a few more masks; channel ion-implantation, or direct-contact between poly-Si lines and source/drain layers, etc.Another factor to reduce the size is to minimize the side-etching and side-diffusion, and anisotropic technologies (or 'dry-process'), such as reactive ion etching and heavy source/drain implantation, were developed at the beginning of 1980’s for the VLSI era. At the same time, stepper (step-and-repeat reduction-projection system) was introduced for higher-resolution lithography. The resolution of the lithography has been improved continuously by introducing a shorter optical wavelength and also by developing various resolution enhancement technologies. Recent introduction of the EUV is a big leap for the wavelength.Since the early 1970’s, short-channel effects (threshold voltage decrease and off-leakage current increase) have been the hurdle for the gate length reduction. The solution was to decrease source/drain junction depth and gate oxide thickness. In order to realize shallow source/drain diffused layers with low resistance, the diffusion element changed from P to As, and new technologies such as low-energy implantation, rapid thermal annealing, and silicided-source/drain were developed. For the thin gate oxide, rapid thermal oxidation, oxynitride gate insulator and finally high-k metal gate technologies were developed. In the early stage of the LSI in 1970s, the semiconductor chips were composed of only 3 major elements, i.e., Si, O, Al with 3 other ones, P, B and H, as additives, but now so many new elements are used for the gate, source, and drain of the MOSFETs, memory cells, and interconnects.Other problems were the degradations of yield and reliability. The mechanisms of the degradations were investigated and many new process/structure/material technologies have been developed as the solutions.In order to suppress the short-channel effects and also to increase the integration density, the structures of the MOSFETs and DRAM/flash memory cells have changed from flat to 3D. Conclusions So huge resources have been invested for the development of micro/nano-electronics in the past 50 years because of its impact to and demands from our modern society, and unbelievably huge progress in engineering and science has been achieved. Indeed, the scales of investment and impact were much bigger than those of the Apollo moon project. The dedication of so many people during the past 50 years has opened up a new smart society in the 21st century with AI, big data, internet and so on. Past 50 years have been really an exciting period. However, the next 50 years will be a more exciting period with a great leap on the base of the micro/nano-electronics.[1] J. Lilienfeld, US1900018A, filed March 28, 1928[2] M. Atalla, and D. Kahng, IRE-AIEE Solid State Device Research Conference, 1960[3] G. Moore, Electronics, Vol. 38, No. 8, April 19, 1965[4] R. Dennard et al., IEEE JSSC, Vol.SC-9, No.5, October, 1974