(Invited) High-Voltage β-Ga2O3 vertical Power Diodes and Transistors with Fin Channels

Abstract

For high voltage and high current applications, vertical power devices are preferred over the lateral counterparts, due to the unaltered footprint with elongated drift region width and the generally higher current density. The development of vertical power devices relies on the ability to epitaxially grow thick drift layers with low defect density and precisely-controlled net doping concentration, often on the order of 1016 cm-3 or lower. One of the unique advantages of β-Ga2O3 over SiC and GaN is the availability of melt-growth methods for the production of high quality single-crystal substrates, which provide excellent platform for homoepitaxy. Recently, high quality thick epitaxial layers grown by halide vapor phase epitaxy (HVPE) have been developed, and β-Ga2O3 vertical power devices have seen rapid developments. In this work, we discuss our recent advancements on high-voltage β-Ga2O3 vertical power diodes and transistors with fin channels. The ultra-high critical breakdown field of 6-8 MV/cm in β-Ga2O3 is another key advantage of this material. While the high critical field leads to a high projected Baliga’s figure-of-merit, it also brings tremendous challenge to the management of the electric field in power devices, especially with the absence of native p-type doping up till now. One example is the Schottky barrier diodes, in which the electric field at the top surface must be controlled to be much lower than the critical field in order to avoid excessive tunneling current. Another example is the device periphery, where proper edge termination designs are required to avoid premature breakdown due to field crowding. To suppress the electrical field at the surface, we adopted fin channels with metal-insulator-semiconductor (MIS)-based sidewall in Schottky barrier diodes. We show that the charge-coupling effect in these structures allows for effective reduction of the electric field at the top surface, therefore effectively reducing the leakage current due to tunneling. The gated fin channels with sub-micron channel width also allow for the realization of normally-off vertical transistors. A general trend of the electric field peak at the bottom corners of a fin channel is discovered, which provides important guidance for the design of vertical fin channel devices. With the help of field-plating at the device periphery, we show that the breakdown voltage of the fin channel transistors can be much improved. With these field management techniques, we achieved state-of-the-art figure-of-merits in both the fin channel diodes as well as transistors.