Abstract
Ge-on-insulator (GeOI) MOSFET structures are advantageous to suppress off-state current levels while keeping the high-performance originated from the high electron and hole mobility. On the other hand, the low thermal budget of the fabrication processes could provide another opportunity for Ge devices. Sequentially stackable COMS devices may be a possible application for 3D-LSIs. In this paper, electrical properties and processes of strained Ge nanowire pMOSFETs and strained GeOI nMOSFETs for high performance applications are presented. Ultra-high hole mobility of over 1900 cm2/Vs and 4-times enhancement of the nMOSFET drive current are demonstrated for the p- and nMOSFETs, respectively. Poly-Ge trigate p- and nFETs on buried oxide (SiO2) layers are also presented for 3D-LSIs. Reasonable operation of sub-100 nm devices and improvement of the current drivability are demonstrated.
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