Abstract

Flexible nonvolatile memories (NVMs) have emerged as powerful assistants for future electronic systems featured to have wearable, stretchable, and bendable characteristics. There have been many unique flexible applications, such as radio frequency identification tag, electronic sensor arrays, flat-panel displays, and electronic circuit configuration. Furthermore, the suitable choice of NVM can effectively reduce the power consumption of set applications. From these technical backgrounds, flexible NVM devices with various operating origins have been fabricated on flexible plastic substrates. Among them, a charge-trap-type memory device composed of charge-storage layer is one of the most typical device configurations. However, conventional charge-trap NVMs have many problems such as asymmetric on- and off-program conditions, long program time for trap/detrap process, and unstable memory operations. Consequently, for the practical applications of flexible NVM devices, it is very important to realize both functions of a lower voltage operation and a more stable memory retention behavior. However, because it is difficult to simultaneously optimize these two functions owing to their trade-off relationship, device performances including the stable memory window and large on/off ratio should be guaranteed for low-power consumption and excellent device stability. Furthermore, the process temperature should be controlled to be as low as possible with the considerations of thermal stability of the flexible plastic substrate. In this work, we propose the flexible charge-trap memory thin-film transistor (f-MTFT) using all oxide-layers, in which sputter-deposited In-Ga-Zn-O (IGZO) and atomic-layer-deposited (ALD) ZnO thin films were used as an active channel and charge-trap layer (CTL), respectively. Poly(ethylene naphthalate) (PEN) was chosen as a flexible substrate due to its superior properties, such as a low linear thermal expansion coefficient, good chemical resistance, surface smoothness, and optical clarity, compared with the other types of plastic substrates. The main object of this work is to demonstrate the appropriate methodologies for high-performance f-MTFTs fabricated on flexible PEN substrate. Thus, fabrication procedures are carefully optimized for guaranteeing the stable memory device characteristics. As results, wide memory margin and very fast program speed are successfully demonstrated. Furthermore, the effect of mechanical deformation on the memory properties are examined as a flexible memory device. The operation stabilities at high temperature of 80 oC are also investigated. To realize the f-MTFTs with high performance and stability, following three strategies were introduced. First, the PEN substrate was pre-treated with hybrid barrier layer structure, which was composed of 3.6-μm-thick acrylic-based organic and 30-nm-thick inorganic Al2O3 films. These organic and inorganic barrier layers were prepared by spin-coating and ALD to obtain a smooth surface and to reduce a water vapor transmission rate, respectively. The second strategy was to optimize the deposition temperature for ZnO CTL, because the electronic natures of the ALD-grown ZnO sensitively depends on its deposition temperature. We previously fabricated the memory devices on glass substrate using the ZnO CTLs by controlling the deposition temperature to 100, 150, and 200 oC. As results, the 100-oC ZnO device exhibited wider memory window and stable retention properties than others. Thus, the ZnO deposition temperature was set as 100 oC. The third strategy was to optimize the patterning process of gate-stack structure. The double-layered structure of the Al2O3 tunneling layers was designed to prevent the wet-etching damages for the IGZO channel layer during the patterning process of CTL. When a single Al2O3 tunneling layer was prepared without an additional protection layer, the IGZO channel layer was decisively over-etched due to the differences in etch rates of each layer. On the contrary, the IGZO channel could be effectively protected by second tunneling layer by wrapping the side areas of the channel layer when the double-layered tunneling layer was introduced. Alternatively, a top-protection layer protected the surface of ZnO CTL during the lithography process. The obtained device characteristics of the fabricated f-MTFT can be summarized as follows. The memory margin, memory window width, and program time were evaluated as 4.7×107, 25.6 V, and 500 ns, respectively. These device characteristics were not markedly degraded even after the delamination, under the bending state with a curvature radius of 3.3 mm, and after the 104 times repetitive bending cycles at a curvature radius of 4.8 mm. Furthermore, the stable memory characteristics were successfully guaranteed even at a high temperature of 80 oC. Device parameters confirmed for the fabricated f-MTFTs presented remarkable improvements compared with previously reported various flexible memory devices. We can conclude that the proposed f-MTFTs on PEN substrates can be a suitable candidate for the highly-functional and stable flexible memory device embedded into the new-era flexible electronic systems.

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