(Invited) Electrochemical Metallization For Semiconductor Applications

Abstract

Initially after the invention of electroplating in 1805 it was mostly for used decorative applications and making printing press plates. But the introduction of copper as a replacement for aluminum as a CMOS interconnect material in 1997 by IBM (1) was a breakthrough in silicon chip manufacturing. The replacement of aluminum by copper not only has the benefit of lower interconnect resistance, but also has enabled improved interconnect reliability. Cu is expected to show better reliability because it has a high melting temperature and much lower grain boundary- and lattice diffusivity than aluminum (2). since electroplating is a low-cost and reliable technique, the method is being used for a wide variety of metal deposition applications in the semiconductor industry that includes interconnect & packaging metallization, and compound semiconductor fabrication for low-cost solar cells. Since the late 1990's, after IBM introduced copper interconnects, the development of the copper damascene process (1,3) and the implementation of the copper-based interconnect has had a considerable impact in the electrochemical society and semiconductor industries. Copper metallization technology has become critical for CMOS back-end interconnect, embedded multi-chip interconnect bridges, and interposers for 2.5D and 3D applications.In this presentation, after a brief discussion of the history of metallization by electrochemistry for semiconductor applications, the development of Copper, Gallium, and Cobalt Metallization will be discussed with their application in the semiconductor technology. The discussion will focus on initial issues that arose and the various directions followed to properly address them. The presentation will then focus on the challenge of barrier and seed step coverage and their impact on defects in Cu damascene metallization. Topics of discussion will include the effect of additives, current density, bath aging, shelf life and their implication on product reliability.References R, Liu, C. Pai and E Martinez " Interconnect Technology Trend for Microelectronics", Solid state Electron. 43, 1003(1999)S. Hau-Riege and C. V. Thomson, " Electromigration in copper interconnects with very different grain structures" Appl. Phys. Lett. 78, 3451 (2001)K. Broadbent, E. J. McInerney, L. A. Gochberg, and R. L. Jackson, " Experimental and Analytical study of seed layer resistance for copper damascene electroplating" J Vac. Sci. Techonl. B17, 2584(1999)