Abstract
The performance, size, weight and power requirements for future systems are increasingly demanding. These can be met by intimate integration of lower power and higher performance scaled CMOS and compound semiconductor technologies into smaller areas and volumes. The more adaptable and more intimate is this integration between two or more technologies, the more flexibility is given to the designer for the selection of the technology for a specific function, or even better, for an optimum combination of different transistor technologies in the same function or cell in the design. Northrop Grumman Aerospace Systems (NGAS) under the Diverse Accessible Heterojunction Integration (DAHI) DARPA program is developing integration processes, design kits and thermal simulation tools to integrate submicron CMOS, InP HBT, GaN HEMT and high-Q passive technologies for advanced DoD systems. We have demonstrated integration of NGAS’ InP HBT and GaN HEMT technologies on 65nm and 45nm CMOS wafers.
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