(Invited) Assessment of Ge1-xSnx Alloys for Strained Ge CMOS Devices

Abstract

In this paper, we propose the fabrication of whole strained Ge complementary metal-oxide-semiconductor (CMOS) with Ge1-xSnx materials as embedded stressors to outperform the state-of-the-art strained Si CMOS. Ge1-xSnx materials have larger lattice constant than that of Ge, which can apply the strain into Ge channel region. Compatibility of Ge1-xSnx (with 2-8% Sn) materials with source/drain engineering processes (B implantation and activation, in situ Ga doping, and Ni(Ge1-ySny) formation) is characterized. A low thermal budget has been determined for those processes on Ge1-xSnx alloys: temperatures must be lower than 600{degree sign}C for B activation and lower than 450{degree sign}C for Ni(Ge1-ySny) formation.