(Invited) ALD Materials for the Integration of III-V Based Transistors

Abstract

III-V compound semiconductors are promising transistor channel materials to enable scaling beyond Si technology due to their high bulk electron mobility values. Engineering the III-V / high-k gate stack remains one of the main technical challenges to integration of these materials in CMOS technology, with Atomic Layer Deposition (ALD) continuing to play an enabling role. In this work, multiple approaches for interfacial sulfur passivation prior to high-k gate stack deposition are explored, with passivated samples exhibiting improved C-V characteristics and reduced Dit values for planar MOSCAPS. Various III-V channel / high-k metal oxide interface layers (ILs) deposited by ALD have also been evaluated in order to reduce the impact of oxide traps while also maintaining a low Dit. A novel ALD interfacial layer material has been developed which demonstrates the potential to meet challenging requirements for III-V channel transistor integration.