Abstract
The deep levels in amorphous Ge0.5Se0.5 layers have been analyzed by Deep-Level Transient Spectroscopy (DLTS). To that end, Metal-Insulator-Semiconductor (MIS) capacitors have been prepared by Physical Vapor Deposition of the layers on p-type silicon substrates. A so-called quasi-constant capacitance procedure has been developed to account for the strong flat-band voltage shift of the capacitance-voltage characteristic with temperature. Applying this procedure to the as-deposited layers in the subthreshold regime reveals a dominant broad hole trap, with deep level parameters (trap concentration NT, hole capture cross section σp and activation energy ET) that strongly depend on the deposition conditions and the layer thickness. It is, finally, shown that the trap filling behavior does not follow the capture kinetics for simple point defects. Based on this observation, arguments are presented for an alternative analysis of the DLTS data.
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