Abstract
AbstractA polysilicon gate structure for application as gate material in p-channel JFET's is presented. The structure was manufactured using solid-phase epitaxy of an evaporated antimony/amorphous—silicon layer. The fabrication process together with experimental evaluation of both diode and JFET characteristics is given. The structure shows near ideal n+p-junction behaviour and the fabricated JFET's are normally off with good values of subthreshold swing and transconductance.
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