Investigation on Multisampling Deadbeat Current Control With Time-Delay Compensation in Grid-Connected Inverter

Abstract

The control of voltage source converters (VSCs) is now implemented on digital microprocessors. This digitalization has the drawback of time delay in the control loop. The goal of this research work was to investigate improvements that can be obtained from the combination of model-based and model-free time-delay compensation approaches. Deadbeat control (DBC) from model-based techniques and the method of moving the control variable’s sampling instants, or the pulse-width modulation (PWM) updating instants, from model-free time-delay compensation techniques, were put together as the proposed new method of time-delay compensation in this study. These controllers were thoroughly examined in terms of control algorithm design, system stability analysis, and sensitivity analysis of plant parameter perturbations. In addition, thorough Simulink-based computer simulations were conducted in this work to assess the performance of each controller. The proposed method compensated about <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$80~\mu \text{s}$ </tex-math></inline-formula> as compared with the time delay compensated by the conventional single-sampling method. This research work was limited to simulations only; hence, conducting experiments to further validate this research work could be a direction for further research.