Investigation of voltage dependent relaxation, charge trapping, and stress induced leakage current effects in HfO2∕Dy2O3 gate stacks grown on Ge (100) substrates

Abstract

Germanium is a very promising material and has an extra advantage due to its higher mobility than silicon. At the same time, high-κ gate dielectrics such as HfO2 are already used for the replacement of SiO2 in advanced complementary metal-oxide-semiconductor (MOS) devices. A buffer interfacial layer is required to have better interfacial quality between HfO2 and the semiconductor substrate. In the present work the authors investigate the voltage dependent relaxation effects and charge trapping characteristics of Pt∕HfO2∕Dy2O3∕p-Ge MOS devices. The devices have been subjected to constant voltage stress and show relaxation effects in the whole range of applied stress voltages (−1to−5V). Charge trapping is negligible at low stress field while at higher fields (>4MV∕cm) it is significant. Also interesting is the fact that the trapped charge is negative at low stress fields but changes to positive at higher fields.