Abstract

Wafer bonding, also termed as “direct bonding” or “wafer direct bonding”, has one of the main advantages for its ability to integrate dissimilar materials in various areas of microelelctronics, optoelectronics, micro/nanoelectromechanical systems (M/NEMS). Silicon is the most extensively used material for semiconductor industry. To meet demands on superior electrical, optical and acoustic applications, it is important to combine silicon with appropriate materials, such as GaAs, quartz glass, and LiTaO3. In general, two wafers are brought into contact at room temperature (~25ºC) and followed by thermal treatment processes (>100ºC) enabling reliable bonding strength to withstand subsequent mechanical grinding or polishing processes. During thermal treatments, the major concern in dissimilar bonded wafer pairs is the thermal stress originating from a mismatch in thermal expansion coefficients. Higher thermal stresses above a critical temperature may cause sliding, debonding, cracking or misfit dislocation between two bonded wafers. It is therefore highly desirable to predict the critical temperatures and optimize the thermal steps for dissimilar bonded wafer pairs with various materials and thicknesses. In this paper, a thermal stress model is developed based on analytical as well as finite element methods. To ensure a good bonding, the thermal stress should be smaller than the critical yield stress of the bonded materials. Meanwhile, the deformation energy should be lower than the bonding energy so that no sliding or debonding occurs during the thermal treatments. Under these two conditions, the critical temperatures for various dissimilar bonded wafer pairs (Si/GaAs, Si/Quartz and Si/LiTaO3) are calculated and predicted. The effects of wafer thickness are also demonstrated. To verify our calculation results, 100-mm silicon wafers are combined to LiTaO3 wafers by plasma activated bonding process. The bonded wafer pairs are heated at different temperatures to strengthen bonding. Experimental results show the critical temperature value is in agreement with our calculation. We believe our model provides a tool to optimize the thermal treatment processes during the dissimilar wafer bonding. It has great potentials to improve the bonding processes for wafer-level hybrid integration.

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