Abstract
This paper presents an investigation of the scalability of 4H SiC MESFETs for high frequency applications by gate length reduction. SiC MESFETs with different gate lengths (0.50, 0.35 and 0.25 μm) and gate types (blockand Γ-gates) were processed on the same wafer. The gate width of these devices ranged from 100 to 400 μm. The MESFET structure uses a thin highly doped p-buffer to improve the output conductance and decrease the short channel effect of the MESFET. This resulted in a 20% and 25% increase in extrinsic fT and fmax, and a 12% increase in output power density.
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