Abstract
A contact resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{c}$ </tex-math></inline-formula> ) becomes a major parasitic resistance in highly scaled modern semiconductor devices. A wrap-around contact (WAC) has been suggested as a promising solution to reduce the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{c}$ </tex-math></inline-formula> , because its contact area is larger than that for the conventional top contact (TC) structure. Therefore, in this article, the electrical and thermal characteristics are widely investigated in vertically stacked gate-all-around (GAA) MOSFET with a WAC by using a 3-D technology computer-aided design (TCAD) simulation. First, compared with the TC, the WAC shows 1.74 times higher ON-state current. It is attributed in part to the low <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{c}$ </tex-math></inline-formula> and in part to the low source–drain resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {SD}}$ </tex-math></inline-formula> ). Furthermore, thermal resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {th}}$ </tex-math></inline-formula> ) is also reduced by 9.73% in WAC, which improves self-heating effects (SHEs). Considering the results, it is expected that the WAC structure could be an attractive candidate to simultaneously improve device performance and reliability.
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