Investigation of Pt/Si/CeO2/Pt MOS Device Structure by Impedance Spectroscopy

Abstract

AbstractEpitaxial growth of dielectric layers on silicon substrates has attracted a great deal of recent interest given their potential applicability in the fabrication of high quality silicon-on-insulator (SOI) structures, high density capacitor devices, and stable buffer layers between silicon and other materials. Cerium dioxide (CeO2) appears to be a particularly attractive candidate, given its high dielectric constant and its compatibility with Si. To date, measurements of the electrical properties of CeO2 films on Si have been largely limited to room temperature. In this study, thin films of CeO2 were prepared by in situ pulsed laser deposition (PLD) on n-type (100) silicon substrates, with varied deposition conditions. Capacitance-voltage measurements (C-V) were used to characterize the response of the Pt/Si/CeO2/Pt MOS capacitor structure. Impedance measurements were performed from room temperature to 350°C. This enabled the independent characterization of the electrical signature of the Pt/Si interface which was found to contribute insignificantly above approximately 150°C. The CeO2 film conductivity was found to be thermally activated with activation energy of ∼0.45 eV, with its magnitude strongly dependent on film microstructure.