Investigation of Passive Transmission Lines for the MIT-LL SFQ5ee Process

Abstract

As the complexity of superconductor circuits grows, we envision a dense network of passive transmission lines (PTLs) being used to interconnect cells in rapid-single-flux-quantum (RSFQ) circuits. In our library approach, each cell has dedicated tracks as place holders for routing PTLs. Higher impedance PTLs are desirable due to their narrower width. However, at higher impedance, the margins for the PTL receiver degrade rapidly. We have designed, fabricated, tested, and simulated passive transmission lines (PTLs) for high-speed interconnects in the MIT-LL SFQ5ee 10 kA/cm 2 process. For the symmetric dual ground planes case, PTLs are in the M1 layer with M0 and M2 ground planes, or in the M3 layer with M2 and M4 ground planes. For the asymmetrical dual ground planes case, PTLs are in M2 or M3 layers with M1 and M4 ground planes. We report ±30% margins for these PTLs. We investigate the receiver margins for these PTLs and report impact of margins as a function of corners, interlayer transitions, variants of drivers, and receivers. We demonstrate 100 GHz PTL operation in ring oscillator measurements. We have also adopted multi-layer multi-conductor transmission line models for PTL simulation. We observe good model-to-hardware correlation for low- and high-frequency operation.