Investigation of Off-State Stress Induced Degradation of SiC MOSFETs Under Short-Circuit Condition

Abstract

Investigation of SiC MOSFETs short-circuit (SC) degradation mechanism is critical to improve the overall reliability of power converters. At present, research on the SiC MOSFETs degradation mechanism mainly focuses on the on-state phase of the SC period. While, ruggedness of SiC MOSFETs in the off-state phase of short-circuit tests (SCTs) were neglected. In this paper, SiC MOSFETs degradation mechanism in the off-state phase of SCTs are investigated comprehensively. Specifically, distribution and magnitude of electrothermal stress of devices under test (DUTs) in the off-state phase of SCTs are analyzed by TCAD simulation. Which reveals two important phenomena: i) the device will suffer from long-term high temperature and high electric field stress in the off-state phase when negative turn-off gate voltage (Vgs-off) is applied; ii) high hole current in the channel region will last for several microseconds after the device is turned off. The observed SiC MOSFETs degradation in the off-state phase of SCTs is then proved by experiments, through which, the excessively low Vgs-off can reduce the SC capability of SiC MOSFETs is concluded. Moreover, the degradation results of static parameters of SiC MOSFETs are presented and the degradation mechanism is analyzed in detail.