Investigation of novel symmetric and asymmetric multilevel converter topology with reduced power switches

Abstract

The multilevel inverter has tremendous challenges to improve the power quality in DC/AC high power application. Multilevel inverter is drawing more attention due to modularity and robustness, especially high voltage applications. In conventional multilevel inverters require a more number of switches and complex switching circuits and size is bulky. This paper proposes a novel multilevel power converter topology with reduced power switches and gate driver circuit without affecting state-of-art necessities. This proposed topology has minimum switching and conduction losses, low voltage stress (dv/dt), low electromagnetic interference, low total harmonic distortion (THD) and better efficiency. Both symmetric and asymmetric methods are simulated using MATLAB/SIMULINK tool. Based on simulation, the prototype experimental setup has been made and results are verified.