Investigation of flow mechanisms in semiconductor wafer fabrication

Abstract

The semiconductor wafer fabrication manufacturing environment is one of the most difficult in which to plan and control. Long and re-entrant routings and high yield loss on new products are two characteristics that impact system performance. This research provides an exploratory investigation of two simplified flow control mechanisms to determine if they might offer promise for further research in this complex environment. Most scheduling and control systems are data intensive and require real-time feedback. Our research explores the use of simple, limited data, flow control mechanisms. The results indicate that these newer planning and control mechanisms, which offer a systems perspective, perform well when compared with a real time, data-intensive, flow control mechanism.