Abstract

Electron backscatter diffraction (EBSD) was applied to investigate the grain size and orientation of polycrystalline CaxSr1–xBi2Ta2O9 (CxS1–xBT) films in ferroelectric-gate field-effect transistors (FeFETs). The CxS1–xBT FeFETs with x = 0, 0.1, 0.2, 0.5, and 1 were characterized by the EBSD inverse pole figure map. The maps of x = 0, 0.1, and 0.2 showed more uniform and smaller grains with more inclusion of the a-axis component along the film normal than the maps of x = 0.5 and 1. Since spontaneous polarization of CxS1–xBT is expected to exist along the a-axis, inclusion of the film normal a-axis component is necessary to obtain polarization versus electric field (P–E) hysteresis curves of the CxS1–xBT when the E is applied across the film. Since memory windows of FeFETs originate from P–E hysteresis curves, the EBSD results were consistent with the electrical performance of the FeFETs, where the FeFETs with x = 0, 0.1, and 0.2 had wider memory windows than those with x = 0.5 and 1. The influence of annealing temperature for C0.1S0.9BT poly-crystallization was also investigated using the EBSD method.

Highlights

  • As a memory device, the ferroelectric-gate field-effect transistor (FeFET) has attracted much interest [1,2,3,4,5,6,7]

  • The electrical properties of Pt/Cx S1–x BT/HAO/Si FeFETs with x = 0, 0.1, 0.2, 0.5, and 1 were reported in our former work [19]

  • When the points with the same crystal orientation are accumulated together and make an area of one color, this is a grain of Cx S1–x BT observed by Electron backscatter diffraction (EBSD)

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Summary

Introduction

The ferroelectric-gate field-effect transistor (FeFET) has attracted much interest [1,2,3,4,5,6,7]. The EBSD is applied for the first time in order to discuss the relevance of the nonvolatile-memory-cell performances of the FeFETs with the ferroelectric crystallinity of the Cx S1–x BT hidden inside the MFIS gate stacks. The EBSD characterizations of Cx S1–x BT layers in the FeFETs were performed after the manufacturing processes were completed and the electrical properties were identified. How to remove the Pt layer was an important technique in this work

Fabrication of FeFETs and Electrical Characterization
EBSD Sample Preparation
EBSD Scanning
Electrical Properties of Cx S1–x BT FeFETs with Varying x
EBSD Characterization Results for Cx S1–x BT FeFETs with Varying x
EBSD Characterization Results for CxS1–xBT FeFETs with Varying x
Energy Dispersive X-Ray Spectroscopy Characterization of CBT
X-ray Diffraction for Cx S1–x BT
X-Ray for CxS1–xBT
Comparison of Electrical
Conclusions
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